Now, a team of researchers led by Professor Huang Xian from the School of Precision Instrument and Opto-electronics ...

The emerging wafer-level packaging (WLP) technology suffers from serious signal integrity (SI) and power integrity (PI) issues due to its redistribution layer (RDL). There exhibit serious parasitic ...

Conventional testing approaches face major limitations, with some methods damaging wafer surfaces irreversibly, while others ...

Different from Chip on Wafer stacking technology, Wafer on Wafer (WoW) stacking can provide a tighter pitch and higher interconnect density with higher through-put. The difficulty for WoW stacking is ...