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A research team led by Associate Prof. Wang Anting from the University of Science and Technology of China (USTC) of the ...
Abstract: An architecture for a time interpolation circuit with an rms error of /spl sim/25 ps has been developed in a 0.7-/spl mu/m CMOS technology. It is based on a ...
Researchers from the Max-Planck-Institut fuer Kernphysik present new experimental and theoretical results for the bound ...
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